You’ve only built a professionally designed breadboard. You’ve done all the simulations you need to do before you lay out and reviewed the manufacturer’s suggested methods for getting a better thermal design for a particular package. You even scrutinized the preliminary thermal analysis equations on paper, giving them due care, aiming to ensure that the IC junction temperature is not exceeded, with looser tolerances. But later, when you turn on the power, the IC is still very hot to the touch. You’re pretty unhappy about it (not to mention the anxiety of your thermal experts and reliability designers). Now, what should you do?
When it comes to overall design reliability, maintaining the integrity of your circuit design under increasing ambient temperature conditions by keeping IC junction temperatures away from absolute maximum levels is an important design consideration. This is especially true as you approach the maximum power dissipation level (Pd max) of the chip central to the specific circuit design.
Your first step in conducting a thermal integrity analysis is a solid understanding of the fundamentals of IC package thermal metrics.
By far the most common metric for package thermal performance is Theta JA, the measured (modeled) thermal resistance from junction to ambient (see Figure 1). The Theta JA values are also the most interpretable (see Figure 2). Some factors that can greatly affect Theta JA measurements and calculations include:
Thermal resistance (Theta JA) data is now valid for leaded surface mount packages using the new JEDEC standard. Actual data was generated on several packages, while thermal models were run on the remaining packages. Data is grouped by package type and the Theta JA value displayed for different airflow levels.
Figure 1 Theta-JA analysis of electrical network
Figure 2 Theta-JA Interpretation
The junction-to-ambient data is the junction-to-case (Theta JC) thermal resistance data (see Figure 3). Actual Theta JC data is generated from packages tested using a JEDEC printed circuit board (PCB).
Figure 3 Theta-JC Interpretation